Senior Staff Engineer Verification

Ability to architect complex module / sub system / full chip testbenches and build verification infrastructure in SV/UVM. Experience: Bachelor's - 9 to 11 years or Master's - 8 to 10 years In depth understanding of ASIC verification concepts and techniques. Ability to architect complex module / sub system / full chip testbenches and build verification infrastructure in SV/UVM. Should be a good mentor and guide the junior engineers in the team. Experience in ARM based SoC verification covering RTL, Power Aware and Gate level simulations is a plus. Knowledge on Ethernet (IEEE 802.3), MIPI protocols, DisplayPort is highly preferable. Should have the experience in building C models for DSP and Verification We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Verification of complex SoCs / IPs and provide technical leadership to the team while creating test plans and Verification Infrastructure Adopt state of art Verification methods. Develop expertise in multiple areas of verification - Formal/Gate level/Power aware Verification Drive Verification closure of complex IPs and SoCs using SV/UVM based methodology Developing C models for DSP and Verification Schedule management and handling cross functional team interactions Mentoring and guiding the team to keep Verification execution on track.