Senior Design Verification Engineer
Content + Source + Freshness • 12 Dec 2025 • 95% confidence
Offer value
High offer value due to the critical technical role and the chance to work with advanced technology in a collaborative environment.
- Key role in advanced hardware development
- Collaboration with diverse technical teams
- Opportunity to shape verification strategies in a high-tech environment
Pros
- High impact role in designing reliable hardware systems
- Working in a dynamic, technology-driven environment
- Strong opportunities for mentorship and collaboration
Cons
- Potentially stressful due to the complexity of verification tasks
- May require long hours during critical project phases
- Uncertainty in workload during project ramps up
Who it's for
Senior level • Hybrid or on-site
Good fit
- Experienced design verification engineers
- Professionals with a strong tech background
- Candidates eager for complex engineering challenges
Not recommended for
- Entry-level engineers without substantial experience
- Individuals not interested in team-oriented projects
- Those avoiding technical challenge in their work
Motivation fit
Key skills
About the job
DESCRIPTION
As a Senior Design Verification Engineer, you will contribute to exploring innovative hardware designs to enhance our devices. You will define verification methodology and implement test plans for advanced functional blocks while collaborating with cross-functional teams to develop world-class hardware devices. You will participate in the bringup of such blocks on Simulation and Emulation platforms.
You will work closely with multi-disciplinary groups including Architecture, RTL Design, PD, Validation, Software and Product Design to architect and implement verification environments for complex functional block that enable development of world-class hardware devices. In this role, you will:
• Architect and implement verification environments for complex functional blocks
• Create and enhance verification environments using SystemVerilog and UVM
• Develop comprehensive test plans through collaboration with design engineers, SW and architects
• Implement coverage measures for stimulus and corner-case scenarios
• Participate in test plan and coverage reviews
• Drive complex RTL and TB debugs
• Drive UPF based low power verification
• Contribute to verification activities across simulation and emulation platforms
• Work on creating the automation scripts to support DV methodologies
• Create infrastructure to performs system level performance analysis
