STA Lead, Physical Design Engineer
Content + Source + Freshness • 12 Dec 2025 • 95% confidence
Offer value
High value due to the strategic importance of timing analysis in cutting-edge technology and competitive compensation.
- Key role in high-speed CPU design and timing analysis
- Salary range up to $500k, reflecting industry demand
- Engagement in multidisciplinary global projects
- Requires high expertise and problem-solving skills
Pros
- Influential role in chip design with high visibility
- Competitive pay framework for various experience levels
- Engagement with multidisciplinary teams across global settings
Cons
- High technical demands due to complex chip designs
- Potential long hours during critical project phases
- Remote work setting may lack some team coherence
Who it's for
Mid to Senior • Remote
Good fit
- Physical design engineers with ASIC experience
- Candidates eager to shape advanced semiconductor designs
- Professionals capable of working remotely while collaborating globally
Not recommended for
- New engineers without relevant timing experience
- Individuals who prefer in-person teamwork only
- Those avoiding technical challenges in chip design
Motivation fit
Key skills
About the job
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
We are looking for a person ready to take up the challenge of working in a high-profile project where we design and integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better.
In this role, you will be responsible for STA timing analysis using industry standard tools for high-speed CPU core design. Knowledge of cutting edge silicon technology 5nm and lower and multi Ghz design is a plus.
This role is Remote, based out of North America.
We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
Responsibilities:
- Full chip timing analysis from early investigation to final implementation and tape out.
- Propose or develop timing methodologies to support the timing flow from RTL synthesis to implementation and timing closure.
- Work with architects and logic designers to generate block and full chip timing constraints.
- Analyze scenarios and margin strategies with Synthesis & Design team.
- Partner with physical design teams to close and sign off the designs through PnR and ECO cycles.
Experience & Qualifications:
- PhD, Masters or Bachelors Degree in EE, EECS or CS.
- Hands-on experience in ASIC timing constraints generation and timing closure.
- Expertise and advanced knowledge of industry standard timing EDA tools (Prime Time, StarRC etc.).
- Deep understanding and experience in timing closure of various functional and test modes
- Expertise in deep-sub micron processes (Crosstalk delay, noise glitch, POCV, IR-STA).
- Proficient in scripting (TCL, Perl, Python, csh/bash).
- Problem solver, Efficient written and verbal communication, Excellent organization skills and Mentorship quality.
- Self starter and highly motivated.
- Ability to work cross-functionally with various teams and be productive under aggressive schedules.
Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.
Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set by the U.S. government.
Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process.
If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government. If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.
