Sr. Staff Verification Engineer
Content + Source + Freshness • 17 Dec 2025 • 95% confidence
Offer value
Similar to the previous role, it offers prospects for advancement in a high-demand field with significant responsibilities.
- Take charge of innovative verification processes in a respected company.
- Engage in continuous development opportunities.
- High potential for steering project directions and methodologies.
- Requires significant industry experience and technical knowledge.
Pros
- Involvement in cutting-edge design verification working with skilled colleagues.
- Strong contribution potential towards advancing technology.
- High chances of career progression into managerial or lead roles.
Cons
- Intense workload can impact work-life balance.
- High qualifications and experience (8+ years) are mandatory.
- Stressful environment due to tight deadlines.
Who it's for
Senior • On-site or hybrid potentially
Good fit
- Experienced verification engineers seeking advancement.
- Professionals eager to work in cutting-edge technology.
- Individuals ready to take on leadership responsibilities.
Not recommended for
- Beginners in the field without applicable experience.
- Those uninterested in a dynamic, high-stress environment.
- Candidates looking for completely remote positions.
Motivation fit
Key skills
About the job
Responsibilities:
Define, develop and optimize comprehensive verification plans and test strategies for digital/mixed-signal IP blocks, subsystems, and full integrated circuits. Work closely with design teams to understand micro-architecture and functional specifications. Create and maintain detailed test plans, coverage models, and verification environments. Drive coverage closure including functional, code, and assertion-based coverage. Generate technical documentation and drive verification reviews. (30%)
Design and implement complex testbenches using System Verilog and UVM methodology. Perform block and chip-level register-transfer level (RTL), gate-level and analog/mixed-signal (AMS) verification. Develop directed test cases, constrained-random verification environments and reusable verification components. Debug complex simulation failures and identify root causes in design or verification environments. Improve verification scalability and portability from project to project by environment enhancement and tools automation. Generate and manage continuous integration, regression testing, scoreboards, monitors, and checkers. (30%)
Report to remote verification & design teams. Mentor junior verification engineers. (20%)
Interface with system, digital hardware, embedded firmware, analog and cross functional teams. (10%)
Drive adoption of advanced verification methodologies, best practices and tool evaluation. (5%)
Technical support to silicon lab evaluation, test, product and application engineers. (5%)
Minimum Qualifications:
8+ years of industry experience in integrated circuit design verification (DV)
B.S. or M.S. in Electrical or Computer Engineering
Strong analytical, synthesis and problem solving skills
In-depth knowledge and experience in digital IC verification for mixed-signal ICs with MCU based hardware systems (ARM, RISC-V, PIC, STM32) with memories, custom digital micro-architecture, interfaces, dedicated hardware peripherals, embedded signal processing, external IPs, and analog peripherals.
Proficiency in System Verilog as High-level Verification Language and UVM implementation, Verilog/VHDL, scripting languages (Python, Perl), debugging capabilities, and industry leading EDA verification tools (Synopsys, Cadence, Siemens)
Demonstration of technical leadership
Experience with standard hardware protocols (I2C, I3C, SPI, MIPI)
Independent, self-motivated, rigorous, innovating, team player and able to follow through
Excellent verbal and written communication skills
Desired Qualifications
Knowledge of system-level aspects: signal processing, mixed-signal, digital hardware, embedded firmware, analog, modelling, test and application
Experience with analog block behavioral modelling with SV RNM/Verilog/VHDL
Experience with consumer and/or ITA market circuit developments
